There is a need for MEMS structures of multiple levels in many applications. Micro machines such as micro waveguides, microgears, micro-field emitters, and other micro-scale or meso-scale machines require precision multi-level etched structures.
There are several methods to build multi-level MEMS structures and they basically fall into two methods. The first method adds levels, the second method removes levels, to obtain the desired structure. Adding levels has disadvantages. If precision is desired, which it often is or MEMS would not be used, the alignment of the levels is crucial. Bonding of the levels, when adding levels, often forms non-uniform bonding spots and voids. Voids are either extrinsic (created by particles or trapped air) or intrinsic (formed during the bonding process). Instead of bonding layers sometimes alignment is accomplished via micro-etched pegs, which require accurate peg and hole placement. Subtracting layers to achieve multiple levels, e.g., by plasma etching techniques, often results in overetching and etching in undesired regions. Hence, there are problems with each method.
One method for creating multiple layers uses a combination of removing and adding layers. Such a method is described in U.S. Pat. No. 6,082,208 to Rodgers et al. In this method a three dimensional element (in this case a MEMS transmission gear set) is micro-machined. The surface micromachining processes are based on steps for depositing and photolithographically patterning alternate layers of silicon and sacrificial material. The steps build up the layer structure of the MEM apparatus (col. 4 lines 52-63). The disadvantage is the complexity of etching and depositing processes needed to build the multi-level structure, the bonding of one layer to the next, and the low speed of manufacture.
One method of removing layers to create multi-level structures in silicon, involves the use of lasers. The process is called Laser-Driven Vapor-Phase Etching (LACE) and can be used to etch multi-level steps to an etch accuracy of a few μm3. The process works by using a laser to selectively drive chemical reactions for dry etching semiconductors. The laser (e.g., 500 nm for Cl2 chamber gas) locally heats the substrate (e.g., Si, aiding in etching) and produces free radicals (e.g., Cl*) locally in the chamber gas. The free radicals etch the substrate at the location of beam by essentially bonding with the substrate material in a gaseous form (e.g., SiCl4). The process can be used to make holes, channels and other complicated structures. One of the disadvantages is that LACE is not a parallel process, the complete substrate is not etched at the same time, only local etching occurs. Thus LACE is not fast enough for most manufacturing applications.
A current method for etching single structures fast and accurately is the DRIE method displayed in FIGS. 1A-1E. The DRIE method permits an etching rate of between 2 and 20 μm/min and a polymer layer, for example an approximately 50 nm thick TEFLON-like polymer (polytetrafluoroethylene-like polymer) layer. The polymerization step can be performed using a mixture of Ar and CHF3. The etching step can be performed for a sufficient duration to attain an etching depth of approximately 2-3 μm. The steps are repeated for desired depth.
Since the DRIE method may be used, as a part of the inventive process later described in the present application, it is described in more detail here. FIGS. 1A-1E display the essentials of the DRIE method of etching. DRIE is a method of anisotropic plasma etching to provide laterally defined recess structures through an etching mask employing a plasma and contact with a reactive etchant gas. The substrate to be etched 20 (FIG. 1A, e.g. silicon), is covered with photoresist 10, patterned and developed. A polymer coating 30 (FIG. 1B, e.g. CHF3) is deposited above the resist 10 and the substrate 20. The system is dry-etched where the base coating is etched at a much larger rate than the vertical structures (Polymer 30 in FIG. 1C) resulting in anisotropic etched structures 40. The etching step and the polymerizing step can be repeated to provide high mask selectivity combined with a very high anisotropy of the etched structures.
The DRIE process is performed separately in separate, alternating sequential etching and polymerization steps. During the etching step, chemically active species and electrically charged particles (ions) are generated in the reactor with the aid of an electrical discharge in a mixture of sulfur hexafluoride (SF6) and Ar. Subsequently a polymerization step is performed with a mix of, for example, trifluoromethane (CHF3) and Ar. The etching and polymerization steps are repeated until the desired structure and etch depth is obtained. Typical polymerization and etching times are about 6 seconds.
The DRIE etch method and other methods like it are not conducive to etching multi-level structures.
The present invention relates to a method for forming multi-level structures that are etched, using a combination of techniques like the DRIE method, from a substrate layer. The process avoids bonding issues raised from layer buildup techniques and is conducive to relatively higher manufacturing speeds.